mirror of
https://codeberg.org/unspeaker/tek.git
synced 2026-01-31 16:36:40 +01:00
77 lines
3 KiB
Rust
77 lines
3 KiB
Rust
use crate::*;
|
|
|
|
/// Define a type alias for iterators of sized items (columns).
|
|
macro_rules! def_sizes_iter {
|
|
($Type:ident => $($Item:ty),+) => {
|
|
pub trait $Type<'a> =
|
|
Iterator<Item=(usize, $(&'a $Item,)+ usize, usize)> + Send + Sync + 'a;
|
|
}
|
|
}
|
|
|
|
mod arranger_api; pub use self::arranger_api::*;
|
|
mod arranger_clip; pub use self::arranger_clip::*;
|
|
mod arranger_model; pub use self::arranger_model::*;
|
|
mod arranger_port; pub use self::arranger_port::*;
|
|
mod arranger_scene; pub use self::arranger_scene::*;
|
|
mod arranger_scenes; pub use self::arranger_scenes::*;
|
|
mod arranger_select; pub use self::arranger_select::*;
|
|
mod arranger_track; pub use self::arranger_track::*;
|
|
mod arranger_tracks; pub use self::arranger_tracks::*;
|
|
mod arranger_view; pub use self::arranger_view::*;
|
|
|
|
def_sizes_iter!(ScenesSizes => Scene);
|
|
def_sizes_iter!(TracksSizes => Track);
|
|
def_sizes_iter!(InputsSizes => JackMidiIn);
|
|
def_sizes_iter!(OutputsSizes => JackMidiOut);
|
|
def_sizes_iter!(PortsSizes => Arc<str>, [PortConnect]);
|
|
|
|
pub(crate) fn wrap (bg: Color, fg: Color, content: impl Content<TuiOut>) -> impl Content<TuiOut> {
|
|
let left = Tui::fg_bg(bg, Reset, Fixed::x(1, RepeatV("▐")));
|
|
let right = Tui::fg_bg(bg, Reset, Fixed::x(1, RepeatV("▌")));
|
|
Bsp::e(left, Bsp::w(right, Tui::fg_bg(fg, bg, content)))
|
|
}
|
|
|
|
pub(crate) fn io_ports <'a, T: PortsSizes<'a>> (
|
|
fg: Color, bg: Color, iter: impl Fn()->T + Send + Sync + 'a
|
|
) -> impl Content<TuiOut> + 'a {
|
|
Map::new(iter, move|(
|
|
index, name, connections, y, y2
|
|
): (usize, &'a Arc<str>, &'a [PortConnect], usize, usize), _|
|
|
map_south(y as u16, (y2-y) as u16, Bsp::s(
|
|
Fill::x(Tui::bold(true, Tui::fg_bg(fg, bg, Align::w(Bsp::e(" ", name))))),
|
|
Map::new(||connections.iter(), move|connect: &'a PortConnect, index|map_south(index as u16, 1,
|
|
Fill::x(Align::w(Tui::bold(false, Tui::fg_bg(fg, bg,
|
|
&connect.info)))))))))
|
|
}
|
|
|
|
pub(crate) fn io_conns <'a, T: PortsSizes<'a>> (
|
|
fg: Color, bg: Color, iter: impl Fn()->T + Send + Sync + 'a
|
|
) -> impl Content<TuiOut> + 'a {
|
|
Map::new(iter, move|(
|
|
index, name, connections, y, y2
|
|
): (usize, &'a Arc<str>, &'a [PortConnect], usize, usize), _|
|
|
map_south(y as u16, (y2-y) as u16, Bsp::s(
|
|
Fill::x(Tui::bold(true, wrap(bg, fg, Fill::x(Align::w("▞▞▞▞ ▞▞▞▞"))))),
|
|
Map::new(||connections.iter(), move|connect, index|map_south(index as u16, 1,
|
|
Fill::x(Align::w(Tui::bold(false, wrap(bg, fg, Fill::x(""))))))))))
|
|
}
|
|
|
|
pub trait HasWidth {
|
|
const MIN_WIDTH: usize;
|
|
/// Increment track width.
|
|
fn width_inc (&mut self);
|
|
/// Decrement track width, down to a hardcoded minimum of [Self::MIN_WIDTH].
|
|
fn width_dec (&mut self);
|
|
}
|
|
|
|
impl HasWidth for Track {
|
|
const MIN_WIDTH: usize = 9;
|
|
fn width_inc (&mut self) {
|
|
self.width += 1;
|
|
}
|
|
fn width_dec (&mut self) {
|
|
if self.width > Track::MIN_WIDTH {
|
|
self.width -= 1;
|
|
}
|
|
}
|
|
}
|