wip: implementing jack port autoconnection

This commit is contained in:
🪞👃🪞 2025-01-09 19:25:32 +01:00
parent b995f81a26
commit c23f52c87b
4 changed files with 246 additions and 155 deletions

View file

@ -1,84 +1,165 @@
use crate::*;
pub struct JackPort<T: PortSpec> {
pub port: Port<T>,
/// Handle to JACK client, for receiving reconnect events.
pub jack: Arc<RwLock<JackConnection>>,
/// Port handle.
pub port: Port<T>,
/// List of ports to connect to.
pub connect: Vec<PortConnect>
}
impl<T: PortSpec> JackPort<T> {
//pub fn new (jack: &impl RegisterPort
pub struct PortConnect {
pub name: PortConnectName,
pub order: PortConnectScope,
pub status: Vec<(Port<Unowned>, PortConnectStatus)>,
}
#[derive(Clone, PartialEq)]
pub enum PortConnect {
impl PortConnect {
/// Connect to this exact port
pub fn exact (name: impl AsRef<str>) -> Self {
let name = PortConnectName::Exact(name.as_ref().into());
Self { name, order: PortConnectScope::One, status: vec![] }
}
pub fn wildcard (name: impl AsRef<str>) -> Self {
let name = PortConnectName::Wildcard(name.as_ref().into());
Self { name, order: PortConnectScope::One, status: vec![] }
}
pub fn wildcard_all (name: impl AsRef<str>) -> Self {
let name = PortConnectName::Wildcard(name.as_ref().into());
Self { name, order: PortConnectScope::All, status: vec![] }
}
pub fn regexp (name: impl AsRef<str>) -> Self {
let name = PortConnectName::RegExp(name.as_ref().into());
Self { name, order: PortConnectScope::One, status: vec![] }
}
pub fn regexp_all (name: impl AsRef<str>) -> Self {
let name = PortConnectName::RegExp(name.as_ref().into());
Self { name, order: PortConnectScope::All, status: vec![] }
}
}
#[derive(Clone, Debug, PartialEq)]
pub enum PortConnectName {
/// Exact match
Exact(Arc<str>),
/// Match wildcard
Wildcard(Arc<str>),
/// Match regular expression
RegExp(Arc<str>),
}
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum PortConnectScope { One, All }
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum PortConnectStatus { Missing, Disconnected, Connected, Mismatch, }
impl<T: PortSpec> AsRef<Port<T>> for JackPort<T> {
fn as_ref (&self) -> &Port<T> {
&self.port
}
}
impl<T: PortSpec> JackPort<T> {
pub fn midi_in (
jack: Arc<RwLock<JackConnection>>, name: impl AsRef<str>, connect: &[PortConnect]
) -> Usually<JackPort<MidiIn>> {
let input = jack.midi_in(name)?;
for port in connect.iter() {
let port = port.as_ref();
if let Some(output) = jack.port_by_name(port).as_ref() {
jack.connect_ports(output, &input)?;
} else {
panic!("Missing MIDI output: {port}. Use jack_lsp to list all port names.");
}
}
Ok(JackPort { jack: jack.clone(), port: input, connect: connect.clone() })
}
pub fn midi_out (
jack: Arc<RwLock<JackConnection>>,
name: impl AsRef<str>,
connect: &[impl AsRef<str>]
) -> Usually<JackPort<MidiOut>> {
let output = jack.midi_out(name)?;
for port in connect.iter() {
let port = port.as_ref();
if let Some(input) = jack.port_by_name(port).as_ref() {
jack.connect_ports(&output, input)?;
} else {
panic!("Missing MIDI input: {port}. Use jack_lsp to list all port names.");
}
}
Ok(JackPort { jack: jack.clone(), port: output, connect: connect.into() })
}
pub fn audio_in (
jack: Arc<RwLock<JackConnection>>,
name: impl AsRef<str>,
connect: &[impl AsRef<str>]
) -> Usually<JackPort<AudioIn>> {
let input = jack.audio_in(name)?;
for port in connect.iter() {
let port = port.as_ref();
if let Some(output) = jack.port_by_name(port).as_ref() {
jack.connect_ports(output, &input)?;
} else {
panic!("Missing MIDI output: {port}. Use jack_lsp to list all port names.");
}
}
Ok(JackPort { jack: jack.clone(), port: input, connect: connect.into() })
}
pub fn audio_out (
jack: Arc<RwLock<JackConnection>>,
name: impl AsRef<str>,
connect: &[impl AsRef<str>]
) -> Usually<JackPort<AudioOut>> {
let output = jack.audio_out(name)?;
for port in connect.iter() {
let port = port.as_ref();
if let Some(input) = jack.port_by_name(port).as_ref() {
jack.client().connect_ports(&output, input)?;
} else {
panic!("Missing MIDI input: {port}. Use jack_lsp to list all port names.");
}
}
Ok(JackPort { jack: jack.clone(), port: output, connect: connect.into() })
}
}
/// This is a utility trait for things that may register or connect [Port]s.
/// It contains shorthand methods to this purpose. It's implemented for
/// `Arc<RwLock<JackConnection>>` for terse port registration in the
/// `init` callback of [JackClient::activate_with].
pub trait RegisterPort {
fn midi_in (&self, name: impl AsRef<str>, connect: &[impl AsRef<str>]) -> Usually<Port<MidiIn>>;
fn midi_out (&self, name: impl AsRef<str>, connect: &[impl AsRef<str>]) -> Usually<Port<MidiOut>>;
fn audio_in (&self, name: impl AsRef<str>, connect: &[impl AsRef<str>]) -> Usually<Port<AudioIn>>;
fn audio_out (&self, name: impl AsRef<str>, connect: &[impl AsRef<str>]) -> Usually<Port<AudioOut>>;
fn midi_in (&self, name: impl AsRef<str>) -> Usually<Port<MidiIn>>;
fn midi_out (&self, name: impl AsRef<str>) -> Usually<Port<MidiOut>>;
fn audio_in (&self, name: impl AsRef<str>) -> Usually<Port<AudioIn>>;
fn audio_out (&self, name: impl AsRef<str>) -> Usually<Port<AudioOut>>;
}
impl RegisterPort for Arc<RwLock<JackConnection>> {
fn midi_in (&self, name: impl AsRef<str>, connect: &[impl AsRef<str>]) -> Usually<Port<MidiIn>> {
let jack = self.read().unwrap();
let input = jack.client().register_port(name.as_ref(), MidiIn::default())?;
for port in connect.iter() {
let port = port.as_ref();
if let Some(output) = jack.port_by_name(port).as_ref() {
jack.client().connect_ports(output, &input)?;
} else {
panic!("Missing MIDI output: {port}. Use jack_lsp to list all port names.");
}
}
Ok(input)
impl RegisterPort for JackConnection {
fn midi_in (&self, name: impl AsRef<str>) -> Usually<Port<MidiIn>> {
Ok(self.client().register_port(name.as_ref(), MidiIn::default())?)
}
fn midi_out (&self, name: impl AsRef<str>, connect: &[impl AsRef<str>]) -> Usually<Port<MidiOut>> {
let jack = self.read().unwrap();
let output = jack.client().register_port(name.as_ref(), MidiOut::default())?;
for port in connect.iter() {
let port = port.as_ref();
if let Some(input) = jack.port_by_name(port).as_ref() {
jack.client().connect_ports(&output, input)?;
} else {
panic!("Missing MIDI input: {port}. Use jack_lsp to list all port names.");
}
}
Ok(output)
fn midi_out (&self, name: impl AsRef<str>) -> Usually<Port<MidiOut>> {
Ok(self.client().register_port(name.as_ref(), MidiOut::default())?)
}
fn audio_in (&self, name: impl AsRef<str>, connect: &[impl AsRef<str>]) -> Usually<Port<AudioIn>> {
let jack = self.read().unwrap();
let input = jack.client().register_port(name.as_ref(), AudioIn::default())?;
for port in connect.iter() {
let port = port.as_ref();
if let Some(output) = jack.port_by_name(port).as_ref() {
jack.client().connect_ports(output, &input)?;
} else {
panic!("Missing MIDI output: {port}. Use jack_lsp to list all port names.");
}
}
Ok(input)
fn audio_in (&self, name: impl AsRef<str>) -> Usually<Port<AudioIn>> {
Ok(self.client().register_port(name.as_ref(), AudioIn::default())?)
}
fn audio_out (&self, name: impl AsRef<str>, connect: &[impl AsRef<str>]) -> Usually<Port<AudioOut>> {
let jack = self.read().unwrap();
let output = jack.client().register_port(name.as_ref(), AudioOut::default())?;
for port in connect.iter() {
let port = port.as_ref();
if let Some(input) = jack.port_by_name(port).as_ref() {
jack.client().connect_ports(&output, input)?;
} else {
panic!("Missing MIDI input: {port}. Use jack_lsp to list all port names.");
}
}
Ok(output)
fn audio_out (&self, name: impl AsRef<str>) -> Usually<Port<AudioOut>> {
Ok(self.client().register_port(name.as_ref(), AudioOut::default())?)
}
}
impl<T: RegisterPort> RegisterPort for Arc<RwLock<T>> {
fn midi_in (&self, name: impl AsRef<str>) -> Usually<Port<MidiIn>> {
self.read().unwrap().midi_in(name)
}
fn midi_out (&self, name: impl AsRef<str>) -> Usually<Port<MidiOut>> {
self.read().unwrap().midi_out(name)
}
fn audio_in (&self, name: impl AsRef<str>) -> Usually<Port<AudioIn>> {
self.read().unwrap().audio_in(name)
}
fn audio_out (&self, name: impl AsRef<str>) -> Usually<Port<AudioOut>> {
self.read().unwrap().audio_out(name)
}
}
@ -131,15 +212,24 @@ pub trait ConnectPort {
Ok(())
}
}
impl ConnectPort for Arc<RwLock<JackConnection>> {
impl ConnectPort for JackConnection {
fn port_by_name (&self, name: impl AsRef<str>) -> Option<Port<Unowned>> {
self.read().unwrap().client().port_by_name(name.as_ref())
self.client().port_by_name(name.as_ref())
}
fn connect_ports <A: PortSpec, B: PortSpec> (&self, source: &Port<A>, target: &Port<B>)
-> Usually<()>
{
Ok(self.read().unwrap().client().connect_ports(source, target)?)
Ok(self.client().connect_ports(source, target)?)
}
}
impl<T: ConnectPort> ConnectPort for Arc<RwLock<T>> {
fn port_by_name (&self, name: impl AsRef<str>) -> Option<Port<Unowned>> {
self.read().unwrap().port_by_name(name.as_ref())
}
fn connect_ports <A: PortSpec, B: PortSpec> (&self, source: &Port<A>, target: &Port<B>)
-> Usually<()>
{
Ok(self.read().unwrap().connect_ports(source, target)?)
}
}