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improve various renderings

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🪞👃🪞 2025-01-25 22:08:49 +01:00
parent bf429cdbbe
commit 58433c0402
6 changed files with 119 additions and 74 deletions
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12
jack/src/jack_port.rs
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@ -164,6 +164,7 @@ pub enum PortConnectName {
pub name: PortConnectName,
pub scope: PortConnectScope,
pub status: Arc<RwLock<Vec<(Port<Unowned>, Arc<str>, PortConnectStatus)>>>,
pub info: Arc<String>,
}
impl PortConnect {
pub fn collect (exact: &[impl AsRef<str>], re: &[impl AsRef<str>], re_all: &[impl AsRef<str>])
@ -177,16 +178,19 @@ impl PortConnect {
}
/// Connect to this exact port
pub fn exact (name: impl AsRef<str>) -> Self {
let info = format!("=:{}", name.as_ref()).into();
let name = Exact(name.as_ref().into());
Self { name, scope: One, status: Arc::new(RwLock::new(vec![])) }
Self { name, scope: One, status: Arc::new(RwLock::new(vec![])), info }
}
pub fn regexp (name: impl AsRef<str>) -> Self {
let info = format!("~:{}", name.as_ref()).into();
let name = RegExp(name.as_ref().into());
Self { name, scope: One, status: Arc::new(RwLock::new(vec![])) }
Self { name, scope: One, status: Arc::new(RwLock::new(vec![])), info }
}
pub fn regexp_all (name: impl AsRef<str>) -> Self {
let info = format!("+:{}", name.as_ref()).into();
let name = RegExp(name.as_ref().into());
Self { name, scope: All, status: Arc::new(RwLock::new(vec![])) }
Self { name, scope: All, status: Arc::new(RwLock::new(vec![])), info }
}
pub fn info (&self) -> Arc<str> {
let status = {
@ -205,6 +209,6 @@ impl PortConnect {
let name = match &self.name {
Exact(name) => format!("= {name}"), RegExp(name) => format!("~ {name}"),
};
format!("({}) {} {}", status, scope, name).into()
format!(" ({}) {} {}", status, scope, name).into()
}
}